Yield Development Engineer at Intel in Phoenix, AZ

  • Company: Intel
  • Location: US, Arizona, Phoenix
  • Salary: $115K – $220K
  • Job type: full time
  • Workplace: hybrid
  • Posted: 2026-10-02

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Job description

Job Details: Job Description: Intel is looking for highly motivated individuals with strong technical background and capabilities to drive rapid continuous improvements in safety, quality, yield, reliability, cost, process stability/capability, and productivity while maintaining rigorous quality control. Your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. The role of a Defect Reduction Engineer is to deliver high-quality analytical insights and to drive yield improvement activities to minimize defects in BU and BE segments. All improvements and sustaining work are done in close collaboration and partnership with the process to improve the capability of the tools and processes. Your responsibilities as a Defect Reduction Engineer may include, but are not limited to: Performing detailed analysis to monitor inline yield and identify the root cause of defect and yield issues using various statistical/data mining tools. Identifying excursionary or baseline sources of defects or yield impacts and recommending/leading corrective actions/fixes. Lead/participate continuous improvement projects on products and processes for improved performance. Provide expertise on process flow segments. Lead/participate in multi-area problem solving teams to provide expertise to troubleshoot complex yield problems. The ideal candidate should exhibit the following behavioral traits: Solid analytical skills and a passion for data analysis and problem solving. Proficiency in translating complex yield data into strategic action plans, establishing clear milestones, accountability, and ownership to drive rapid issue resolution. Effective communication and presentation skills to influence decision-making in a wide variety of groups at all levels. Excellent teamwork, leadership skills, problem solving and prioritization skills, and driving high-performance maintenance goals for the group. Organizational skills with attention to detail. Ability to thrive in a fast-paced environment with the flexibility to meet tight product timelines. Strong drive for self-improvement and a passion for independently acquiring new technical skills, mastering emerging data science tools, and staying current with semiconductor industry trends to solve increasingly complex challenges. Behavioral traits Strong communication skills, proactive problem-solving capabilities, and adaptability in a fast-paced environment. Connect analysis results to process fundamentals, tool behavior, and physics principles. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship Minimum Qualifications Bachelor's degree in Materials Science and Engineering, Mechanical Engineering, Computer Science, Information Systems, Chemical Engineering, Electrical Engineering, Physics, or Chemistry, with 4+ years of hands-on experience in yield analysis, OR a Master's degree with 3+ years of experience, OR a Ph.D. with no prior professional experience. Experience mentioned above should be a combination of the following areas: Engineering analysis tools and scripting methods, including Python, JMP, and SQL. Analyze big data and perform commonality analysis using data science libraries and dashboard creation. Root Cause Analysis, Model-based Problem Solving, Commonality Analysis Preferred Qualifications: Experience in yield, integration, LYA (Layout Yield Analysis), FA (Failure Analysis), test, sort, defect metrology, or QNR. Proven experience leading cross-functional teams to solve yield-related challenges. Familiarity with wafer-level or package assembly processes or substrate process flow, including process flow, tools, and yield issues. Semicond

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