Sr Staff Engineer, Program/Project Management-Test Readiness Lead- Rack at Celestica in Richardson, TX

Job description

Req ID: 140238 Region: Americas Country: USA State/Province: Texas City: Richardson Summary As the Senior Manager of HPS Test Engineering, you will own the end-to-end testing architecture, strategy, and execution for next-generation or products and infrastructure. This position bridges the gap between top-tier silicon designers, internal hardware/software teams, and volume manufacturing operations. You will be responsible for leading a high-performing team of test hardware and software engineers to develop comprehensive test solutions (ICT, FCT, SLT, BI and Boundary Scan). You will maintain critical cross-functional alignment with the Front-End Senior Manager, Back-End Senior Manager, and Director of Technology Roadmapping to maximize test coverage, minimize escape metrics, and optimize manufacturing throughput and first-pass yield. Detailed Description 1. People Management & Team Leadership Talent Development & Mentorship: Directly manage, coach, and mentor a specialized team of Test Hardware and Software Engineers, fostering technical proficiency in advanced diagnostic test development and automated frameworks. Performance Management: Define clear test engineering metrics, KPIs, and deliverables; conduct objective performance evaluations and outline robust engineering career paths. Resource Optimization: Plan and manage engineering bandwidth, test equipment budgets (CapEx), and lab infrastructure allocations across concurrent high-visibility NPI initiatives. 2. Early Engagement & Design for Testability (DFT) DFT Strategy Ownership: Drive comprehensive DFT/DFx technical reviews during early schematic and board layout design stages to maximize structural and functional test access. Silicon Partner Collaboration: Engage directly with tier-1 silicon architects (e.g., Nvidia, Broadcom, Marvell, Intel, AMD) to embed built-in self-test (BIST), high-speed JTAG boundary scan architectures, and advanced custom diagnostic hooks. Test Plan Architecture: Formulate unified product test specifications (PTS) defining rigorous test coverage matrices, test point allocations, and optimization bounds before design freeze. 3. Advanced Test Characterization & Process Development Multi-Level Test Execution: Oversee the specification, architecture, and deployment of In-Circuit Test (ICT), Functional Test (FCT), System-Level Test (SLT), and Environmental Stress Screening (ESS/Burn-in) solutions. Yield Optimization & Data Analytics: Analyze production data sets to identify false failures, test instabilities, and gauge R&R shortfalls, systematically driving continuous optimization of test limits and fixture designs. NPI Core Prototyping: Provide hands-on engineering guidance for initial test vehicle bring-up and debugs, test fixture qualification, diagnostic software stability checks, and strict version control for test binaries. #HPS-NA Knowledge/Skills/Competencies People Management Experience: 5+ years of direct experience leading and scaling multi-disciplinary test hardware and software engineering teams. Industry Context: Proven experience deploying complex test vectors for high-speed digital systems, enterprise servers, hyperscaler infrastructure, or working directly alongside tier-1 silicon providers (Nvidia, Broadcom, Marvell). Technical Expertise: Expert level understanding of DFT methodologies, IEEE 1149.x Boundary Scan (JTAG), high-speed serial links (PCIe Gen 5/6, SerDes), instrumentation automation, programming frameworks (Python, C/C++, LabVIEW), and database/data mining systems for statistical process control (SPC). Leadership Strategy: Outstanding project management maturity with a focus on metrics-driven problem solving (Six Sigma Black Belt preferred); ability to translate technical yield constraints to business risks for C-suite and customer reviews. Physical Demands Duties of this position are performed in a normal office environment. Duties may require extended periods of sitting and sustained visual concentration on a computer mo