Principal CAD Engineer at Impinj in Rio Grande do Sul
- Company: Impinj
- Location: Porto Alegre, Rio Grande do Sul, Brazil
- Job type: full time
- Workplace: onsite
- Posted: 2026-10-06
Job description
Impinj delivers the Physical Intelligence that connects the physical world to the AI-powered digital world, fueling automated workflows and improving consumer experiences. From retail merchandise and groceries to packages and shipping pallets, Impinj products and solutions identify and track tens of billions of everyday items, providing real-time operational insights about every item enterprises make, move and sell. We are, quite literally, the eyes and ears of smart enterprise systems. Come help us build technology and solutions that enable businesses to visualize everything, waste nothing and act instantly. Team Overview: The CAD Silicon Support Engineering team is the backbone of our silicon development engine. We are a high-impact, multi-disciplinary group of engineers dedicated to building, maintaining, and optimizing the critical Electronic Design Automation (EDA) environments, toolchains, and methodologies that enable our design teams to tape out world-class silicon. Our mission, to accelerate time-to-market and maximize engineering productivity by delivering robust, highly automated, and deterministic CAD workflows. We bridge the gap between EDA vendor tools and the unique, complex demands of our custom silicon architectures, ensuring maximum tool uptime, optimal license utilization, and flawless data management. What you will do: Develop process development kit elements (PDK), including DRC, LVS and Extraction rule decks, model files, custom parameterized cells, and timing files. Setup and configure EDA tools for design teams Specify workstation and server systems, develop Linux OS installation and maintenance scripts, administer and support user accounts Support team members on the Linux Operating System Support circuit and layout designers using DRC, LVS and Extraction tools Support analog and digital design flows and tools from project setup through tape out Work with static timing tools and library characterization tools Work alongside designers to help debug and sometimes automate design tasks, and be a liaison between designers and tool vendors What you will bring: Bachelor’s degree with 15 years of experience or MS with 10 years of experience in Electrical Engineering or related field 10+ years in a design and/or design automation field Experience with Physical Verification Tools (DRC/LVS/Extraction tools) Proficiency in one or more programming and Scripting Languages (Cadence Skill, Perl, Python, Unix shell, C, C++, Web development) Experience supporting Linux operating systems Experience working with CMOS silicon processes Excellent written and verbal communication skills Demonstrated ability to document technical processes clearly and communicate findings across engineering and cross-functional teams. Ability to work effectively in a collaborative, fast-paced environment while managing multiple priorities and deadlines Experience with 60% or more of the following tools and methodologies : Cadence Analog tools (Virtuoso, Spectre, ADE) Cadence PCell development Synopsys Digital tools (Fusion Compiler, PrimeLib) Synopsys library characterization tools Electromigration (EMIR) analysis tools Built-in Self-Test (BiST) generation tools Administering FlexLM licenses Subversion, Git, or other version control systems EDA Design Management systems Experience with Cadence Assura, PVS, Quantus, or Pegasus Experience with Siemens Calibre tools Red Hat Linux system administration experience Experience with infrastructure-as-code for system setup Compensation & Benefits: The benefits listed below may vary depending on the nature of your employment with Impinj and the country where you work. Individual base pay depends on various factors such as complexity and responsibility of role, job duties, requirements, and relevant experience and skills. Both market wage data and the mid-point of the pay range is reviewed and used as the starting point for all new hire offers. Offers are made within the base pay range applicable at th
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